This standard defines the IEEE 1076.1language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on the IEEE 1076(VHDL) language and extends it to provide capabilities of writing andsimulating analog and mixed-signal models.
To provide a comprehensive mixed-signal description and simulation capabilities as an extension to the IEEE VHDL 1076 language. The revision corrects editorial errors and clarifies aspects of the language definition in the 1076.1-1999 standard, and updates the 1076.1-1999 standard to reflect changes in the VHDL 1076-2002 specification.
Revision Standard – Superseded. This standard defines the IEEE 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on IEEE Std 1076-1993 (VHDL) and extends it with additions and changes to provide capabilities of writing and simulating analog and mixed-signal models.
To provide a comprehensive mixed-signal description and simulation capabilities as an extension to the IEEE VHDL 1076 language. The revision corrects editorial errors and clarifies aspects of the language definition in the 1076.1-1999 standard, and updates the 1076.1-1999 standard to reflect changes in the VHDL 1076-2002 specification.
Revision Standard – Superseded. This standard defines the IEEE 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on IEEE Std 1076-1993 (VHDL) and extends it with additions and changes to provide capabilities of writing and simulating analog and mixed-signal models.
